product data sheet j-type voltage controlled crystal oscillator features output frequencies from 1.024 mhz to 170.000 mhz ?+3.3 or +5.0 volt options ?small 14mm x 9mm j-type package ?cmos or pecl outputs ?low phase noise and custom options ?0/70 c or ?0/85 c operating temperature ?tri-state output (cmos) enable/disable (pecl) applications ?clock smoothing ?frequency translation ?sonet, sdh, atm, dslam, adm description the j-type voltage controlled crystal oscillator incorpo- rates vi s advanced vcxo performance capabilities while adhering to a package footprint compatible with the industry-common j-lead package. the j-type vcxo is a quartz stabilized square wave generator with either a cmos output for driving cmos/ttl loads or a pecl output. the device is pack- aged in a 6 pin j-lead ceramic package and is hermeti- cally sealed with a grounded conductive lid.
j-type voltage controlled crystal oscillator vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron 1 vc vcxo control voltage. 2 tri-state 1 ttl logic low disables output ttl logic high, or no connect, enables output 3 gnd case and electrical ground. 4 output vcxo output 5 cmos/ttl ttl logic low optimizes symmetry for cmos select 1,2 ttl logic high, or nc, optimizes symmetry for ttl. 6v cc power supply voltage (5.0 v or 3.3v 10%) pin out information for the cmos output option electrical performance @ 25?c for the cmos output option cmos output option 1. standard option. tri-state can be connected to pin 5 and cmos/ttl select would be on pin 2. 2. output is hcmos. for frequencies >12mhz, this option optimizes symmetry for either cmos or ttl thresholds. ground this pin for fre- quencies < 12mhz. supply voltage 1 , +5 volt option 4.5 5.0 5.5 vdc +3.3 volt option 3.0 3.3 3.6 vdc supply current 10ma + 0.25ma per mhz, typical center frequency, see ordering information f n 1.024 77.760 mhz operating temperature, see ordering info t op 0/70, -40/85 ?c absolute pull range over the operating tempera- apr 50 to 100 ppm ture range, aging and power supply vc = 0.5 to 4.5 at 5v supply or 0.3 to 3.0 v at 3.3v supply see ordering information for options gain transfer k v positive (frequency vs. control voltage) output level high 2 v oh 0.8*vcc - v output level low 2 v ol - 0.1*vcc v output rise/fall time 2 t r / t f 5ns duty cycle 3 , see ordering info sym 45/55 or 40/60 % control input leakage i l 1ua control voltage modulation bandwidth bw - 10 - khz rms jitter, output=12.0-77.760 mhz 3ps rms jitter, output =12.0-77.760 mhz. <0.5 ps band =12.0 khz - 20 mhz control range 0 v dd maximum supply voltage 7v storage temperature t s -55 - 125 ?c soldering temp./time t ls - - 220/10 ?c/s 2 parameter symbol minimum typical maximum unit 1. power supply bypass is required and a 0.1uf in parallel with a 0.01uf high frequency capacitor is recommended. 2. figure 1 defines these parameters. figure 2 illustrates the load used to test devices. 3. duty cycle is defined as on-time versus period at 1.4 v for ttl, and 2.5 v for cmos (5volt supply) and at 1.65 v for cmos (3. 3 volt operation) pin symbol function
j-type voltage controlled crystal oscillator vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron cmos output option 3 output test conditions (255?c) for 5 volt devices. for 3.3v use 15pf cap only, no resistors needed. threshold = 1.4 volts for ttl and 50% for cmos figure 1 output wave form figure 2 output test conditions 1.024 1.544 2.000 2.048 3.088 3.580 3.686 4.000 4.032 4.096 4.434 5.000 6.144 6.176 6.312 6.400 8.000 8.192 8.448 10.000 12.000 12.288 12.352 13.000 14.318 15.360 15.440 16.000 16.384 18.432 19.44 20.000 20.480 24.000 24.576 24.704 27.000 30.000 32.000 32.768 34.368 35.328 38.880 40.000 40.960 44.736 50.000 51.840 52.000 65.536 77.760 155.520 1 standard frequencies, in mhz, for cmos output option ordering information for the cmos output option (add frequency) 4 j 6 pin c 5v10% u vcxo g 50 c 0/70 a ttl/ t tri state n standard ceramic cmos on pin 2 soj 45/55% 1 d 3.3v10% l 10% n 80 l -40/85 j cmos linear 45/55% 2 vcxo h 100 k cmos 40/60% 3 package supply vcxo apr operating output/duty tri-state specials voltage type (ppm) temp. cycle (?c) min/max 1. output is cmos and symmetry is tested at ttl and cmos thresholds. 2. output is cmos and symmetry is tested at cmos threshold. this option is used for 3.3 v operation. 3. output is cmos and symmetry is tested at cmos thresholds. this option is required for 3.3v, frequencies >51.840mhz. 4. note: not all combinations are possible. example: jdugcktn @ 77.76 mhz = 3.3 volt, vcxo@77.760, 50 ppm apr, 0/70?c, 40/60% symmetry, cmos, tri-state on pin 2. 1. uses a pll multiplier, jitter is 25ps rms typical vs 3ps rms typical for a hff (high frequency fundemental) design. available with 5 vdc input only. other frequencies available upon request.
vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron 4 j-type voltage controlled crystal oscillator 1 vc vcxo control voltage. 2 n/c or e/d 1 no connect or output disable option 3 gnd case and electrical ground. 4 output vcxo output 5c output vcxo complementary output 6v cc power supply voltage (5.0 v or 3.3v 10%) pin out information for the pecl output option electrical performance @ 25?c for the pecl output option pecl output option 1. by setting pin 2 high, the outputs are disabled and output on pin 4 is held low while complementary output on pin 5 is held h igh. output is enabled by setting pin 2 at < vcc -1.6v, see ordering information for enable/disable option. supply voltage 1 , +5 volt option 4.5 5.0 5.5 vdc +3.3 volt option 3.0 3.3 3.6 vdc supply current (frequency dependent) <65ma center frequency, see ordering information f n 15 170 mhz operating temperature, see ordering info t op 0/70, -40/85 ?c absolute pull range over the operating tempera- apr 32 to 50 ppm ture range, aging and power supply vc= 0.5 to 4.5 at 5v supply or 0.3 to 3.0 v at 3.3 supply see ordering information for options gain transfer k v positive (frequency vs. control voltage) output level high 2 (0/70?c) v oh vcc-1.025 - vcc-0.880 v output level low 2 (0/70?c) v ol vcc-1.810 - vcc-1.620 v output level high 2 (-40/+85?c) v oh vcc-1.085 - vcc-0.880 v output level low 2 (-40/+85?c) v ol vcc-1.830 - vcc-1.555 v output rise/fall time 2 t r / t f 1ns duty cycle sym 45/55 % control input leakage i l 0.1 ma control voltage modulation bandwidth bw 10 khz rms jitter see ordering information ps rms jitter, 155.52 mhz, 12 khz to 20 mhz (option p) 0.5 1.0 ps maximum control voltage 0 v dd maximum supply voltage 7v storage temperature t s -55 - 125 ?c soldering temp./time t ls - - 220/10 ?c/s parameter symbol minimum typical maximum unit 1. power supply bypass is required and a 0.1uf in parallel with a 0.01uf high frequency capacitor is recommended. 2. transition times are measured from 20% to 80% of a full 10k ecl level swing. pin symbol function
j-type voltage controlled crystal oscillator vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron 5 output test conditions (255?c) pecl output option ordering information for the pecl output option (add frequency) 1 j 6 pin c 5v10% u vcxo f 32 c 0/70 m pecl u none n standard ceramic 45/55% soj d 3.3v10% l 10% g 50 l -40/85 e enable/ p 6ps rms linear disable (<1ps rms vcxo on pin 2 12 khz-20 mhz) jitter m 20ppm r 12ps rms stability jitter vcxo t 20ps rms jitter package supply vcxo apr operating output/duty enable/ specials voltage type (ppm) temp. cycle disable (?c) min/max 1. note: not all combinations are possible. example: jduglmep @77.76 mhz = 3.3 volt, vcxo @77.760, 50 ppm apr, -40/85?c, 45/55% symmetry, pecl, enable/disable on pin 2, 6ps rms jitter 77.760 82.944 155.52 standard frequencies, in mhz, for pecl output options other frequencies available upon request. output wave form output test conditions
j-type voltage controlled crystal oscillator vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron tape and reel outline drawing 6 tape dimensions reel dimensions # per reel product a b c d e f g h i j k l j-type 24 11.5 1.5 4 12 1.78 21 13 100 5 25 330 200 tape and reel dimensions (mm)
j-type voltage controlled crystal oscillator vectron international 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 fax: 1-888-fax-vectron typical frequency translation diagram 7 typical clock smoothing diagram recommended solder reflow profile suggested ir profile vi qualification includes aging at various extreme tem- peratures, shock and vibration; temperature cycling and ir reflow simulation. the conditions a device can withstand are well understood and devices can be subjected to the profile in figure above. this profile shows a ramp up condition to prevent thermal shock, a preheat per iod in which the flux is activated, a ramp up to 183? c which is the eutectic temperature of sn/pb and a gradual cool down. the time above 183? c should not exceed 60 seconds and the peak temperature should be no more than 220? c for 10 seconds. the j- types are 100% screened for hermeticity so an aqueous wash is not an issue.
usa: vectron international ?267 lowell road, hudson, nh 03051 . . . . tel: 1-88-vectron-1 ?fax: 1-888-fax-vectron europe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . tel: 49 (0) 3328 4784 17 ? fax: 49 (0) 3328 4784 30 asia: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . tel: +86 21 28909740 / 41 / 42 ? fax: +86 21 28909240 / 2890999 vectron international reserves the right to make changes to the product(s) and/or information contained herein without notice. no liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such produ ct(s) or information. printed in usa 6/00, rev. 8/16/02 www.vectron.com visit our website at www.vectron.com for additional information please contact: j-type voltage controlled crystal oscillator 8 esd ratings handling precautions human body model 1500v charged device model 1500v although esd protection circuitry has been designed into the the j-type, proper precautions should be taken when handling and mounting. vi employs a human body model and a charged-device model (cdm) for esd susceptibility testing and design pro- tection evaluation. esd thresholds are dependent on the circuit parameters used to define the model. although no industry wide standard has been adopted for the cdm, a standard hbm of resistance = 1.5kohms and capacitance = 100pf is widely used and therefore can be used for comparison purposes. mechanical shock mil-std-883, 2002 mechanical vibration mil-std-883, 2007 solderability mil-std-883, 2003 gross and fine leak mil-std-883, 1014 resistance to solvents mil-std-883, 1016 parameter conditions mechanical and environmental compliance vectron international 2000 model minimum recommended solder pad layout
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